IBM standard CMOS process to create III-FinFET

The overall semiconductor industry is trying to find a way, you do not need to convert from the silicon substrate and the use of indium gallium arsenide (InGaAs) higher electron mobility, including Intel (Intel) and Samsung (Samsung); and IBM have demonstrated how to use standard CMOS process technology to achieve these objectives.

Last month, IBM demonstrated a will of III-V (III-V) InGaAs compound onto the insulating coating of silicon (SOI) wafer technology, and now the company has another research team is claimed to have found a more good way to bulk silicon wafer using standard and produce indium gallium arsenide on silicon confirmed its feasibility.

IBM Research for Advanced Materials Department Manager, CMOS expert Jean Fompeyrine said: “We have massive SOI silicon wafers instead of the start, first put the oxide layer, and then make a trench below the silicon wafer; then its a grow roots of InGaAs ── this is a very high manufacturing procedures. ”

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