Today, Intel announced the Intel Stratix 10 MX FPGA, the industry’s first field-programmable gate array (FPGA) with integrated high-bandwidth memory DRAM (HBM2). By integrating HBM2, Intel Stratix 10 MX FPGAs provide up to 10 times the memory bandwidth of a standalone DDR memory solution. With its powerful bandwidth capabilities, Intel Stratix 10 MX FPGAs can be used as basic multifunction accelerators for high performance computing (HPC), data center, network function virtualization (NFV) and broadcast applications that require hardware accelerators to promote large-scale data movement and Flow Data Pipeline Frame Speed. xc3s200-4tqg144c

In HPC environments, the ability to compress and decompress data before and after mass data movement is critical. HBM2-integrated FPGAs compress and accelerate larger data movements than stand-alone FPGAs. In high performance data analytics (HPDA) environments, streaming data pipeline frameworks such as Apache * Kafka and Apache * Spark Streaming require real-time hardware acceleration. The Intel Stratix 10 MX FPGA can read / write data and encrypt / decrypt data (in real time) at the same time without adding to the host CPU resources.

Reynette Au, vice president of marketing for Programmable Solutions at Intel, said: “To efficiently accelerate these workloads, we need to ensure that memory bandwidth is in sync with the data surge.We designed the Intel Stratix 10 MX Series to provide the HPC and HPDA markets with FPGA-based New multi-function data accelerator. ” xc2v1000-5fg456c

With integrated HBM2, the Intel Stratix 10 MX FPGA family offers up to 512 GB / second of memory bandwidth. HBM2 vertically stacks the DRAM layer using through-silicon (TSV) technology. These DRAM layers are stacked on a base layer and the high-density microbumps are used to connect the base layer to the FPGA. The Intel Stratix 10 MX FPGA family leverages Intel Embedded Multi-Chip Interconnect Bridging (EMIB) to provide high-speed communication between FPGA logic and DRAM. EMIB is used to integrate the HBM2 with a high-performance monolithic FPGA fabric to address memory bandwidth bottlenecks with excellent energy efficiency.

Intel is shipping several models of the Intel Stratix 10 FPGA family, including the Intel Stratix 10 GX FPGA with 28G Transceiver and the Intel Stratix 10 SX FPGA with an Embedded Quad Core ARM Processor. The Intel Stratix 10 FPGA family incorporates Intel’s 14-nanometer FinFET process and state-of-the-art packaging technology, including EMIB.

Silicon Labs (also known as “core technology”) has introduced a series of high-performance I2C programmable crystal oscillator (XO), with the best jitter performance and frequency flexibility. With typical jitter performance down to 95fs, the Si544 / Si549 Ultra Series ™ Programmable XOs provide maximum jitter margin for high-speed 28Gbps and 56Gbps transceivers in 100/200 / 400G communications and data center applications. These XOs can generate any frequency from 200kHz to 1.5GHz and have a 4ppt tuning resolution, making the single device suitable for a wide range of applications. xc2c512-10pqg208c

James Wilson, Sr. Director of Marketing for Clock Products at Silicon Labs, said: “The proliferation of optical networks, very large data centers and mobile forward / backhaul networks is accelerating, adding the need for ultra-low jitter clocking solutions. By choosing Silicon Labs The I2C configurable Si54x Ultra Series Oscillator allows system designers to easily use the industry’s most programmable, programmable XOs with maximum frequency flexibility and maximizes SNR margin to reduce development risk and ensure a successful design. ”

The Si544 / Si549 XO supports up to four preset, pin-selectable start-up frequencies. After power-up, the device operating frequency can also be easily changed via the I2C interface. The flexibility of this configuration allows a single oscillator to replace multiple single-frequency, dual-band or quad-band XO and mux devices. The devices can be powered from a single 1.8, 2.5 or 3.3V supply, eliminating the need to use different XO models for different supply voltages. The I2C interface of the Si54x XO supports up to 1MHz (Fast-mode Plus) update rates and is fully compatible with a wide range of ASSPs, ASICs, SoCs, and FPGAs. zhcs506ta

The Si544 / Si549 XOs support 3.2mm x 5mm and 5mm x 7mm packages, offering superior frequency flexibility over the standard fixed frequency XO in the same package. This compatibility enables hardware designers to prototype with I2C programmable XO and easily migrate to single-frequency XO as the design transitions to production.

The Si54x XO is designed for 56Gbps transceivers. These transceiver designs rely on Pulse Amplitude Modulation (PAM4) signals for serial data transmission. PAM4 uses fourth-order signals to increase the bit rate for each channel while keeping the bandwidth constant. This trade-off makes the design inherently more susceptible to noise and maximizes the signal-to-noise margin (SNR) margin by using ultralow jitter reference clocks such as Si544 / Si549 devices to help prevent bit errors and preserve Signal integrity.

The Si544 / Si549 oscillator utilizes Silicon Labs’ advanced 4th generation DSPLL® technology to provide an ultra-low jitter clock source at any output frequency. The devices are programmable to any frequency from 200kHz to 1.5GHz with a resolution of 4ppt. On-chip power regulation Provides power supply noise rejection for consistent, reliable low-jitter operation in noisy environments common to high-speed networks and data centers. The Si544 / Si549 XOs also provide a flexible, reliable alternative to oscillators based on low-jitter surface acoustic wave (SAW) while providing excellent frequency tolerance and temperature stability. The Si544 / Si549 oscillator supports all popular output formats including LVDS, LVPECL, HCSL, CML, CMOS and Dual CMOS.

In addition to the Si544 / Si549 family of products, Silicon Labs is also expanding its XO / VCXO product family to include a wider range of package options. These amplified products include the Si54x Ultra Series XO, Si59x Universal XO / VCXO (3.2mm x 5mm), and Si51x Universal XO / VCXO (2.5mm x 3.2mm) in an industry standard 5mm x 7mm package. By expanding its product line-up, Silicon Labs can offer its customers a one-stop shop for high-performance oscillators.

–XMOS, Inc., a leading provider of advanced embedded voice and audio solutions for the consumer electronics market, today announced the XVF3500 voice processor supporting stereo AEC and the world’s first stereo AEC far-field linear microphone array solution – VocalFusion Stereo Evaluation Kit (XK-VF3500-L33).

The XVF3500 voice processor offers 2 channels of full duplex acoustic echo cancellation (AEC). Designed for developers working in a growing market such as voice-based smart TVs, sound bar, set-top boxes and digital media adapters – all of these markets require stereo AECs to support “entire room” Voice interface solution.

Uniquely, the solution also supports configurable AEC delays that allow the AEC reference signal to be accurately calibrated and delay adjusted to provide far-field voice after-sales accessories for existing consumer electronics.

Commenting on the release of this product, Mark Lippett, President and CEO of XMOS, said: “The device and evaluation kit will further advance the integration of embedded voice-control devices on the edge of our room, especially those for high-quality music and TV control And we look forward to demonstrating this solution at the Consumer Electronics Show (CES) in Las Vegas next month.We have the most comprehensive portfolio of far-field pick-up solutions yet to be released Consolidated this position. ”

Like all other XMOS voice solutions, the solution accurately captures commands from anywhere in the room, even in complex acoustical environments, for processing with cloud-based speech recognition systems. The XVF3500 voice processor provides sophisticated voice digital signal processing (DSP) – including a full-duplex acoustic echo canceller (AEC) with voice interrupt capability that enables users to interrupt or pause a device that is playing music – and Adaptive beamformer, which can track the speaker. In addition, it provides advanced dereverberation, automatic gain control and noise suppression – providing a clear voice interaction experience even in noisy environments.

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